Topic 2 · Computer Organisation

Binary `1010` = 8+2 = 10.

Divide by 2; remainders read bottom-up.

Group bits in 4s from the right; each nibble is one hex digit.

A=10, B=11, C=12, D=13, E=14, F=15.

Multiply by 2; carries read top-down. May repeat → inexact floats.

−x = flip every bit of x, then add 1. Subtraction becomes addition.

Leading bit: 0 = non-negative, 1 = negative.

−2^(n−1) to 2^(n−1)−1. 8 bits → −128 to +127.

AND (both), OR (either), NOT (flip); NAND/NOR/XOR built from these.

n inputs → 2ⁿ rows; precedence NOT → AND → OR.

NOT(A AND B) = NOT A OR NOT B.

Central Processing Unit. The chip that runs every instruction. Brain of every computer.

Control Unit (manager, fetches + decodes) + ALU (worker, does maths/logic) + Registers (tiny notebooks, hold current values).

Eternal loop. FETCH instruction from RAM (using PC) → DECODE (CU) → EXECUTE (ALU/etc) → PC advances → repeat.

Special register holding the ADDRESS of the next instruction. JUMP instructions overwrite it.

The fixed list of operations a CPU understands (LOAD, ADD, JUMP). x86 (Intel/AMD), ARM (phones/Apple).

Cycles per second. 3 GHz = 3 billion. Higher = more work + more heat + more power.

Multiple complete CPUs on one chip. Each runs independently. 4-core 3 GHz can do up to 12 GHz of total work — IF the program is parallel.

Register (~1 ns) → L1 (~1 ns) → L2 (~3 ns) → L3 (~12 ns) → RAM (~100 ns) → SSD (~100 μs) → HDD (~10 ms). Each step ~10× larger + slower.

HIT: data is in cache, ~1 ns. MISS: data not in cache, ~100 ns + CPU stall = ~300 wasted cycles.

Why caches work. Temporal: recent addresses likely reused. Spatial: nearby addresses likely accessed next.

RAM = working memory, fast, VOLATILE (lost on power off). Storage (SSD/HDD) = permanent, slow, non-volatile.

CU ≠ ALU. CU manages, ALU computes. RAM ≠ Cache. Cache is smaller, on-CPU, ~100× faster.

Bit rules: 0+0=0, 0+1=1, 1+1=10 (write 0 carry 1), 1+1+1=11 (write 1 carry 1).

Subtract X by adding the two's-complement negation of X. One adder circuit does both.

Result outside the representable range. In n-bit two's complement: max +2^(n-1)−1, min −2^(n-1). Overflow gives a SILENTLY wrong result.

Each hex digit = exactly 4 bits. Convert digit-by-digit. Hex is binary in compact form.

NOT(A AND B) = (NOT A) OR (NOT B). NOT(A OR B) = (NOT A) AND (NOT B).

X OR (X AND Y) = X. X AND (X OR Y) = X. Used to simplify expressions and reduce gate count.

Exclusive OR: true when inputs DIFFER. Standard form: (A AND NOT B) OR (NOT A AND B).

0.1 + 0.2 ≠ 0.3 exactly. Most decimal fractions cannot be represented in binary precisely → rounding errors.

Always pick a type wide enough for your value range. 16-bit signed → ±32767. Ariane 5: $370M lost to one overflow.

Iterate data in MEMORY ORDER (row-major in C/Python). Same algorithm, 10× speed difference is realistic.